The input of the amplifier is matched with the 6.8 pF SMD capacitor
and the two inductors
L1 and L2. The output is not matched, the 39 nH inductor on the drain is merely a DC choke.
The source terminals of the FET are RF grounded with plenty of different size chip capacitors.
Good RF grounding is absolutely neccessary since the FET has gain up to frequencies well
above 10 GHz. The FET is self-biased using the two parallel 100 ohm source resistors
(total source resistance 50 ohms). This keeps the gate-source voltage negative since the
source current rises the source potential nearly 1 V above the ground. The drain current is
approximately 15 mA when using the component values in the schematic. The drain-source
voltage is approximately 3 V. The components marked as "FB" are ferrite beads which are
used for suppressing potential unstability in the SHF range.
The supply voltage (12 V) is fed to the amplifier through the coaxial
cable in the output.
The voltage is regulated with a zener diode and filtered with some capacitors before
supplying it to the drain. See the network analyzer plots of the frequency response and
input return loss of the amplifier.
There are no photographs or PCB etching patterns available for the amplifier.
is mounted in the antenna mast together with RX bandpass filter, so if the amplifier fails and
has to be taken down for repair, I might take a photograph of it, otherwise not.
Petri Kotilainen OH3MCK